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シミュレーションの実行

Linux の場合(Windows WSL2 も含む)

Linux の場合は、test として export したディレクトリにテストソフトウェアごとにディレクトリが作成されます。

その中にシェルスクリプトが入っているため、そのままそのシェルスクリプトを実行するだけで良いです。

$ ./tb.sh
tb.sh - Script generated by export_simulation (Vivado v2022.2 (64-bit)-id)

INFO: [VRFC 10-2263] Analyzing Verilog file "/home/cotton/Documents/vivado_tcl_minimal_example/src/top.v" into library xil_defaultlib
...

****** xsim v2022.2 (64-bit)
**** SW Build 3671981 on Fri Oct 14 04:59:54 MDT 2022
**** IP Build 3669848 on Fri Oct 14 08:30:02 MDT 2022
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.

source xsim.dir/tb/xsim_script.tcl
# xsim {tb} -autoloadwcfg -tclbatch {cmd.tcl} -key {Behavioral:sim_1:Functional:tb}
Time resolution is 1 ps
source cmd.tcl
## set curr_wave [current_wave_config]
## if { [string length $curr_wave] == 0 } {
## if { [llength [get_objects]] > 0} {
## add_wave /
## set_property needs_save false [current_wave_config]
## } else {
## send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
## }
## }
## run 1000ns
## quit
INFO: [Common 17-206] Exiting xsim at Thu May 8 18:40:04 2025...

シェルスクリプトによって正常にテストが実行されたことが確認できます。

Windows の場合

Windows の場合、明確な方法を見つけることができなかったのですが、Linux で生成されるシェルスクリプトを読み解いて、一応実行に成功したのでここに置いておきます。誰か正攻法を教えていただきたいです...

C:\Users\Hoge\tcl_example-main\export_sim\xsim>"C:\Xilinx\Vivado\2024.2\bin\xvlog.bat" -prj vlog.prj
INFO: [VRFC 10-2263] Analyzing Verilog file "C:/Users/Hoge/tcl_example-main/src/top.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module top
INFO: [VRFC 10-2263] Analyzing Verilog file "C:/Users/Hoge/tcl_example-main/src/tb.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module tb
INFO: [VRFC 10-2263] Analyzing Verilog file "C:/Users/Hoge/tcl_example-main/export_sim/xsim/glbl.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module glbl

C:\Users\Hoge\tcl_example-main\export_sim\xsim>"C:\Xilinx\Vivado\2024.2\bin\xelab.bat" --incr --debug typical --relax --mt 2 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl -log elaborate.log
Vivado Simulator v2024.2.0
Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
Running: C:/Xilinx/Vivado/2024.2/bin/unwrapped/win64.o/xelab.exe --incr --debug typical --relax --mt 2 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl -log elaborate.log
Using 2 slave threads.
Starting static elaboration
Pass Through NonSizing Optimizer
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
Time Resolution for simulation is 1ps
Compiling module xil_defaultlib.top
Compiling module xil_defaultlib.tb
Compiling module xil_defaultlib.glbl
Built simulation snapshot tb


C:\Users\Hoge\tcl_example-main\export_sim\xsim>"C:\Xilinx\Vivado\2024.2\bin\xsim.bat" tb -key {Behavioral:sim_1:Functional:tb} -tclbatch cmd.tcl -log simulate.log

****** xsim v2024.2 (64-bit)
**** SW Build 5239630 on Fri Nov 08 22:35:27 MST 2024
**** IP Build 5239520 on Sun Nov 10 16:12:51 MST 2024
**** SharedData Build 5239561 on Fri Nov 08 14:39:27 MST 2024
**** Start of session at: Thu May 8 18:53:23 2025
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

source xsim.dir/tb/xsim_script.tcl
# xsim {tb} -autoloadwcfg -tclbatch {cmd.tcl} -key {Behavioral:sim_1:Functional:tb}
Time resolution is 1 ps
source cmd.tcl
## set curr_wave [current_wave_config]
## if { [string length $curr_wave] == 0 } {
## if { [llength [get_objects]] > 0} {
## add_wave /
## set_property needs_save false [current_wave_config]
## } else {
## send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
## }
## }
## run 1000ns
## quit
INFO: [Common 17-206] Exiting xsim at Thu May 8 18:53:27 2025...